Ultra-small interferometric fiber optic gyroscope with an integrated optical chip

 1.   IOC driven by a driver circuit (DCC)

A schematic illustration of the IOC is shown in Fig. 2(a).

2(a)

 2(b)

Fig. 2. “Three-in-one” integrated optical chip (a) schematic and (b) photograph.

      An IOC is the core element of the integrated IFOG, which includes the functions of light emission, detection, and splitting/combining.

     The IOC consists of three separate waveguide chips - the SLD, the PD, and the beam splitter Y1.They were produced in parallel and then integrated into a combined chip by chip-to-chip coupling techniques.

(1) SLD

       The SLD is the light-emitting functional unit of the IOC, and its performance directly determines the performance of the IFOG. Using an SLD with high power, a wide spectrum and low-power fluctuation can effectively reduce noise and improve the signal-to-noise ratio (SNR) of an integrated IFOG. The low-temperature drift characteristic of an SLD can effectively improve the scale factor performance of an IFOG over the full temperature range.

       To expand its bandwidth, we adopted the dual-quantum-well III-V gain medium to expand the bandwidth of the SLD.  An optical surface-matching SLD chip was mounted into a planar lightwave circuit (PLC) through chip- to-chip coupling techniques. The main aim is to realize low-loss, high-integration coupling between the SLD chip and Y- branch chip.

(2)PD

        As the light-receiving functional unit of the IOC, the PD's responsivity reflects the sensitivity of the IFOG, while its noise voltage and dark current determine the noise level of the IFOG, and its 3 dB bandwidth determines the response speed of the IFOG. InGaAs was bonded to the substrate by a wafer bonding process with low dark current, high responsivity, and high reliability. The p-n junction in the PIN structure converts light photons into current. The absorbed photons make electron-hole pairs in the depletion region, which is one of the key subcomponent technologies required to manufacture etched metal- ized micro-mirrors that redirect light out of the waveguide and into the surface-mounted PD chip. To improve the absorption coefficient of the material, micro-fabrication processes are optimized. To reduce the dark current, the design of material defects, surface leakage current, and metal-semiconductor contact resistance are optimized.

(3)Y1

        As the light-splitting/combining functional unit of the IOC, it is necessary to ensure that the beam splitter Y1 has a small inser- tion loss and precise light-splitting characteristics. A 3 dB passive waveguide coupler is made with doped SiO₂, which is used to direct 50% of the light propagating in the waveguide into the SLD and PD that are surface mounted on the chip. Through global optimization of the waveguide width, subwavelength structure period, duty cycle, and length of the coupling region, an ultra-small and large-bandwidth beam splitter was obtained.

(4) “Three-in-one” integrated optical chip

       A “three-in-one” IOC is mounted on a thermal cooler (TEC) to maintain a stable power and wavelength for proper operation. All of these components stand within a metallic package, which is interfaced and wire-bonded to allow electrical contact with electrical pins and a fiber pigtail that isolates the package from external interference. The structure of the IOC package is shown in Fig. 2(b).

Amicrohigh-symmetry fiber coil is the core sensitive element of the integrated IFOG  which has three aspects:

(2) Its length/diameter and loss directly limit the ultimate accuracy of the gyroscope.

(3) Its symmetry and extinction ratio directly limit the environmental adaptability of the gyroscope (temperature, vibration, magnetic fields).

       A thin-clad polarization-maintaining fiber with dimensions of 60/100 pm is used to wind the micro-fiber coil to satisfy the miniaturization requirements of the integrated IFOG. The temperature field uniformity of the fiber coil is effectively improved when reducing the size of the fiber coil. For this reason, the temperature sensitivity of the integrated IFOG is reduced.

      To solve the problems of geometric and stress symmetry in the fabrication of the miniaturized fiber coil, the orthogonal quadrupole symmetry method is used for fiber coil winding, which makes the stress in the coil evenly distributed and controllable.

       At the same time, to reduce the changes in internal stress introduced by the environmental factors of the coil, a small-sized optical fiber coil is developed using the fine-diameter optical fiber online gluing process (Fig. 3).

      The geometric parameters are as follows: inner diameter = 10 mm, outer diameter = 26 mm, length = 580 m. According to a calculation of the IFOG's limit accuracy, the design accuracy of the integrated IFOG is 0.05 deg/h.

Fig. 3. Miniaturized optical fiber coil with coin for scale.

 3.ASIC based SDC

       The circuits used in the integrated IFOG mainly include an SDC and a drive control circuit (DCC). The SDC provides digital demodulation, closed-loop control, and data communication. The DCC provides a constant current and temperature to maintain a stable optical power and wavelength throughout the optical path. An ASIC is used to build a miniaturized SDC. The ASIC is a large-scale analogue-to-digital mixed-signal integrated chip integrated with an analogue-digital converter (ADC), digital-analogue converter (DAC), digital signal processor (DSP), low dropout regulator (LDO), and communication interface. An SDC based on ASIC has the advantages of micro-size, high-performance, and anti-interference properties. The schematic diagram and photograph of the ASIC are shown in Figs. 4(a) and 4(b), respectively.

Fig. 4. Miniaturized signal detection circuit (a) schematic and (b) photograph

   
   The working principle of the ASIC is as follows. The input signal is the analogue voltage signal output by the PD on the IOC. After the voltage signal is regulated to satisfy the input range of the ADC, the on-chip ADC converts the analogue signal into digital signal D1, which is demodulated according to the preset parameters from the electrically erasable programmable read-only memory (EEPROM) into digital signal D2, which is converted into an analogue signal through the on-chip DAC. After being driven by an amplifier, the signal is assigned to the phase modulator to realize closed-loop control of the integrated IFOG.

        A clock circuit is used to control the working sequence of the whole system. The on-chip LDO is used to supply power to the ASIC. The communication interface circuit mainly provides the serial communication function of the gyro.

       The typical structure of the DCC is shown in Fig. 5(a): the core temperature of the SLD is detected through a Wheatstone bridge. If the actual temperature deviates from the set temperature, the bridge is unbalanced, and the voltage difference is amplified by voltage and power amplification. Then, the TEC is driven to raise or lower the core temperature of the SLD. Through closed-loop control, the temperature bridge is finally dynamically balanced so as to achieve stable temperature control of the IOC. The DCC can satisfy the miniaturization requirements of the integrated IFOG and is shown in Fig. 5(b).

Fig. 5. Miniaturized drive control circuit (a) flowchart and (b) photograph.

        A single-mode fiber was inserted between the IOC and the IOM to eliminate the antisymmetric mode of radiation from the Y-joint and improve integration.

       Based on the IOC, miniaturized optical fiber coil, DCC, and SDC, a prototype integrated IFOG was successfully fabricated [Fig. 6(a)]. The overall size of the IFOG is only 30 mm X 30 mm X 30 mm, which is much smaller than that of a traditional IFOG. The static performance of the integrated IFOG prototype was tested at room temperature, with the results shown in Fig. 6(b). For analyzing the limiting factor of the long-term drift, the Allan deviation is obtained. Figure 6(c) further illustrates the nature of the gyro stability, in which the uncertainty in the rotation rate is plotted versus the integration time under a typical data run of 3600 s. The bias stability of the IFOG is very close to the theoretical accuracy limit determined by the fiber coil.

(a)

Fig. 6. (a) Prototype, (b) test results, and (c) Allan variance analyses of the integrated IFOG.

          Table 2 compares the accuracy and size of the integrated IFOG and a conventional commercial IFOG. The accuracy of the integrated IFOG is significantly higher than that of the world's smallest IFOG—the Russian VG191. It has the same accuracy as the DSP1750 (a typical miniaturized IFOG with near-navigation-grade performance developed by the KVH company), yet its size is about 50% less. The integrated IFOG has significant accuracy advantages compared with other IFOGs of similar size and has significant size advantages compared with conventional IFOGs of similar accuracy.

Table 2. Comparison between the Integrated IFOG and Traditional IFOG

IV.Conclusions

        In this paper, an IOC-based IFOG, application-specific integrated circuit (ASIC), and small-diameter sensing coil are proposed. The integrated IFOG combines the advantages of the small size of IOC technology and the high precision of IFOGs. The overall size of the gyro is only 30 mm X 30 mm X 30 mm, which is equivalent to the world's smallest IFOG. However, the accuracy of the integrated IFOG is significantly higher and can satisfy the requirements of near-navigation-grade compact INSs.